In digital communication systems, data is generally transmitted as a sequence of high and low voltage signals without an accompanying clock signal. In addition, most communication systems support multiple sampling rates of the signal. For an unknown digital signal, a receiver can therefore need to determine the incoming sampling rate. Rate determination of and synchronization to a received signal are often difficult to achieve for a conventional digital signal, particularly if there are relatively long stretches of either high digital values or low digital values. During such periods, there are no transitions in the signal that can be used as a reference for synchronization or rate synchronization.
Biphase mark coding (BMC) addresses this difficulty in conventional digital signals. Like a traditional digital signal, for a BMC coded signal one bit is transmitted for each clock cycle. Unlike a traditional digital signal, however, between each bit there is a signal transition in polarity on each edge (from high to low or from low to high). In order to transmit a “1” value, an additional transition besides on the edges also occurs after half a clock cycle (a clock cycle can also be referred to as a “cell”). To transmit a “0” value, no transition occurs in the middle of a cell. Therefore, to decode a signal encoded using BMC, a determination in each cell is made as to whether a transition occurs in the middle of the cell or not. If no transition occurs, a “0” value is interpreted, and if a transition occurs in the middle of the cell a “1” value is interpreted.
In one application for a BMC decoder a BMC decoder is optionally used in the receive direction of a Universal Serial Bus (USB) power delivery (PD) modem instead of the USB PD radio frequency (RF) demodulation scheme which operates directly on the input USB Type C connector CC wire (DUT input). The BMC decoder reverses the BMC encoding process by extracting the original data message from the BMC encoded signal by oversampling the BMC encoded input signal. When enabled, the BMC decoder constantly searches for the preamble of the signal, and uses the preamble to lock on where the BMC decoder determines the clock rate of the signal by detecting 90 and 270 degree phases of the clock.